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Help me understand what goes on in a CPU.

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  1. #1
    Try thinking about the simplest computer whose job is to simply add two numbers together, using binary obviously.

    You have 2 banks of 4 switches.
    You enter your two numbers by flipping the switches.
    eg 1010 and 1010
    You now ask your CPU to add them.
    And your 5 Light bulbs display the answer: 10100

    I'm sure you can work out the Logic Gates necessary to build this CPU.
    Hint: Just ANDing this would give you 0000 so you need extra gates to handle the carry.


    Moving on 40 years you get to the MOS 6502,
    which can handle more than the one ADD instruction and uses more advanced Input Output techniques than switches and light bulbs.
    The switches are replaced by 8 bit Registers which can handle numbers up to 256, Hex $00-$FF
    However it has 2 other tricks up it's sleeve to handle bigger numbers.
    - It can use two 8 bit bytes as Low and High to process 16-bit numbers.
    - It can use it's Registers to point to memory addresses where the numbers are stored.
    The Programs are now held in memory so there are instructions to jump or branch to different parts of the program.

    So the CPU would get instructions like:
    Code:
     LDA $0A   ; Load the Accumulator
     ADC $0A   ; Add value to the accumulator
     STA $20   ; Store the result from the accumulator somewhere.
     JMP $FC00 ; Jump to memory location $FC00 for your next instruction, perhaps a routine to display the result on the screen.

    Spoiler:


    Code:
     ; Example 6502 code.  Simple 16-bit square root.
               ;
               ; Returns the 8-bit square root in $20 of the
               ; 16-bit number in $20 (low) and $21 (high). The
               ; remainder is in location $21.
               
               sqrt16  LDY #$01     ; lsby of first odd number = 1
                       STY $22
                       DEY
                       STY $23      ; msby of first odd number (sqrt = 0)
               again   SEC
                       LDA $20      ; save remainder in X register
                       TAX          ; subtract odd lo from integer lo
                       SBC $22
                       STA $20
                       LDA $21      ; subtract odd hi from integer hi
                       SBC $23
                       STA $21      ; is subtract result negative?
                       BCC nomore   ; no. increment square root
                       INY
                       LDA $22      ; calculate next odd number
                       ADC #$01
                       STA $22
                       BCC again
                       INC $23
                       JMP again
                nomore STY $20      ; all done, store square root
                       STX $21      ; and remainder
                       RTS
             
               
               This is based on the observation that the square root of an 
               integer is equal to the number of times an increasing odd 
               number can be subtracted from the original number and remain 
               positive.  For example,
               
                       25
                     -  1         1
                       --
                       24
                     -  3         2
                       --
                       21
                     -  5         3
                       --
                       16
                     -  7         4
                       --
                        9
                     -  9         5 = square root of 25
                       --
                        0

    Notice from the hidden example that the 6502 did have an SBC subtraction instruction.
    As well as DEC, INC, DEX, INX, DEY, INY to add or subtract one from the accumulator or the X and Y registers, Incrementing and Decrementing.
    Technically the ALU section of the CPU would perform those actions along with ORA, ASL and other arithmetic or logic instructions.
    Whilst the CU section of the CPU would perform JMP, BNE, TXA, STX, STA type instructions.
    But it is a single chip, processing a single instruction per clock cycle, so it isn't really relevant to separate CU and ALU instructions apart from keeping your sock drawer organised.
    So after making your minecraft ADD building you can make a DEC building, SUB building, STA building and warehouse(memory).


    So how does the 6502 display the result?
    >> It doesn't
    Not it's job.
    The CPU processes the programs.
    The Operating System is also just a program but it works with the BIOS which controls all the physical electronics.

    A 6502 based Commodore 64 for example would display the ASCII characters the program stored in memory locations reserved for the screen, ($0400-$07E7).
    But you can't just STA $0400 the result of your addition, you have to work out the ascii string that represents it for humans to read.
    (Those light bulbs are looking like a much better interface now aren't they).
    Not forgetting the 'Video Interface Chip' which was actually scanning those memory locations for the creation of the analogue signals which were sent to the cathode ray tube.


    Move on another 30 years.
    Modern computers don't use screen addressing, a dedicated GPU is told by the CPU that the programmer has requested some fancy shaded graphic, so get on and do it, you can find the instructions in this location.
    Whilst another core of the CPU is telling the maths co-processor where to find the instructions to decode the encrypted streaming video that the GPU will be asked to display.

    Amazingly though this is all still happening with Lo Volt or Hi Volt signals being sent through an array of standard logic gates, (millions of them, which is why it is helpful to keep them organised).
  2. #2
    MadMojoMonkey's Avatar
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    Thanks, Chemist. So much good stuff I have to work with in there.

    Quote Originally Posted by chemist View Post
    So after making your minecraft ADD building you can make a DEC building, SUB building, STA building and warehouse(memory).
    Hah. Cool.

    I wouldn't have bothered with Minecraft if not for the RedLogic mod. The add/sub design I built is not really a building; it's more like a slab.

    Spoiler:
    It's 2 tall, 24 deep (26 counting input and output rails) and 2*(n+1) wide. Where n is number of bits. This is a ripple-adder, not CLA. Technically, the adder is only 16 deep. The other 8 tiles in the slab perform a 2's compliment with logic that converts negative results into a 5-bit signed format.

    That was built before I discovered the RedLogic "Bundled" gates. With the Bundled AND and Bundled XOR gates, you only need 2 of each to make a 16 bit full adder. However, you have to bit shift the carries, which becomes the dominating part of the architecture in size.


    I made an INC/DEC "slab" and a bit shifter, already

    So all that thought I put into coupling the adder and subtractor was for naught. Cool.

    I'm a teensy bit disappointed that it's a decoupling of all the things. It would be cooler if it was one of those cases where all of the things simplified down into a relatively tiny set of gates.


    Wooo! I knew you guys would be kicking this process along. Thank you.


    EDIT: Oh yeah. In Minecraft, the minimum possible time for a single gate operation is 50 ms. The notion of graphics processing is just not going to happen when 20 Hz is the clock speed of each gate. It's several orders of magnitude away from anything like that.
    Last edited by MadMojoMonkey; 09-30-2014 at 09:29 PM.

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